@article{panagouAcceleratingMachineLearning2024,

title = {Accelerating Machine Learning Inference on GPUs with SYCL},

author = {Ioanna-Maria Panagou and Nikolaos Bellas and Lorenzo Moneta and Sanjiban Sengupta},

url = {https://doi.org/10.1145/3648115.3648123},

doi = {10.1145/3648115.3648123},

year  = {2024},

date = {2024-04-01},

journal = {Proceedings of the 12th International Workshop on OpenCL and SYCL},

pages = {1–2},

publisher = {ACM},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{polychronisSafeOptimisticPath2021,

title = {Safe Optimistic Path Planning for Autonomous Drones under Dynamic Energy Costs},

author = {Giorgos Polychronis and Spyros Lalis},

url = {https://doi.org/10.1109/itsc48978.2021.9564911},

doi = {10.1109/itsc48978.2021.9564911},

year  = {2021},

date = {2021-09-01},

journal = {2021 IEEE International Intelligent Transportation Systems Conference (ITSC)},

pages = {1927–1933},

address = {Indianapolis, United States},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{kasidakisReducingMissionTime2021,

title = {Reducing the Mission Time of Drone Applications through Location-Aware Edge Computing},

author = {Theodoros Kasidakis and Giorgos Polychronis and Manos Koutsoubelias and Spyros Lalis},

url = {https://doi.org/10.1109/icfec51620.2021.00014},

doi = {10.1109/icfec51620.2021.00014},

year  = {2021},

date = {2021-05-01},

journal = {2021 IEEE 5th International Conference on Fog and Edge Computing (ICFEC)},

pages = {45–52},

address = {Virtual Conference},

abstract = {In data-driven applications, which go beyond simple data collection, drones may need to process sensor measurements at certain locations, during the mission. However, the onboard computing platforms typically have strong resource limitations, which may lead to significant delays and long mission times. To address this problem, we explore the potential of offloading heavyweight computations from the drone to nearby edge computing infrastructure. We discuss a concrete implementation for a service-oriented application software stack, which takes offloading decisions based on the expected service invocation time and the locations of the servers expected to be available in the mission area. We evaluate our implementation using an experimental setup that combines a hardware-in-the-loop and software-in-the-loop configuration. Our results show that the proposed approach can reduce the total mission time significantly, by up to 48% vs local-only processing, and by 10% vs more naive opportunistic offloading, depending on the mission scenario.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{kalogirouExploitingCPUVoltage2019,

title = {Exploiting CPU Voltage Margins to Increase the Profit of Cloud Infrastructure Providers},

author = {Christos Kalogirou and Panos Koutsovasilis and Christos D. Antonopoulos and Nikolaos Bellas and Spyros Lalis and Srikumar Venugopal and Christian Pinto},

url = {http://10.64.82.15/csl/wp-content/uploads/2019/09/ccgrid19.pdf http://10.64.82.15/csl/wp-content/uploads/2019/10/ccGrid19_poster.pdf https://doi.org/10.1109/CCGRID.2019.00044},

doi = {10.1109/CCGRID.2019.00044},

year  = {2019},

date = {2019-05-01},

journal = {2019 19th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGRID)},

pages = {302–311},

publisher = {IEEE},

address = {Larnaca, Cyprus},

abstract = {Energy efficiency is a major concern for cloud computing, with CPUs accounting a significant fraction of datacenter nodes power consumption. CPU manufacturers introduce voltage margins to guarantee correct operation. However, these are unnecessarily wide for real-world execution scenarios, and translate to increased power consumption. In this paper, we investigate how such margins can be exploited by infrastructure operators, by selectively undervolting nodes, at the controlled risk of inducing failures and activating service-level agreement (SLA) violation penalties. We model the problem in a formal way, capturing the most important aspects that drive VM management and system configuration decisions. Then, we introduce XM-VFS policy that reduces infrastructure operator costs by reducing voltage margins, and compare it with the state-of-the-art which employs dynamic voltage-frequency scaling (DVFS) and workload consolidation. We perform simulations to quantify the cost reduction, considering the energy consumption and potential SLA violations. Our results show significant gains, up to 17.35% and 16.32% for the energy and cost reduction respectively. In our simulations, we use realistic assumptions for voltage margins, energy consumption and performance degradation of applications due to frequency scaling, based on the characterization of commercial Intel- and ARM-based machines. Our model and scheduling policy are generic and scalable.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{polychronisDynamicVehicleRouting2019,

title = {Dynamic Vehicle Routing under Uncertain Travel Costs and Refueling Opportunities},

author = {Giorgos Polychronis and Spyros Lalis},

url = {https://doi.org/10.5220/0007673900520063},

doi = {10.5220/0007673900520063},

year  = {2019},

date = {2019-05-01},

journal = {Proceedings of the 5th International Conference on Vehicle Technology and Intelligent Transport Systems},

pages = {52–63},

publisher = {SCITEPRESS - Science and Technology Publications},

address = {Heraklion, Greece},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{kalogirouSchedulingPoliciesHeterogeneous2017,

title = {Scheduling Policies for Heterogeneous, Approximate Computing Systems},

author = {Christos Kalogirou and Michalis Spyrou and Konstantinos Theodosiou and Christos D. Antonopoulos},

url = {http://doi.acm.org/10.1145/3139367.3139428},

doi = {10.1145/3139367.3139428},

year  = {2017},

date = {2017-09-01},

journal = {Proceedings of the 21st Pan-Hellenic Conference on Informatics},

volume = {7134},

pages = {1–6},

address = {Larissa, Greece},

abstract = {Energy consumption is a primary concern for modern computer systems. Conservative approaches, such as DVFS, which have been used in the past to optimize the performance / power tradeoff have reached their limits. Heterogeneity is a promising approach: devices with different characteristics, each performance- and energy-efficient for specific computational patterns are combined in the same system. Approximate computing is another more disruptive solution: many applications can tolerate controlled quality loss in exchange to significant improvement of performance and energy footprint. In this paper we introduce three scheduling policies that exploit heterogeneity, one of them combining it with approximate computing. These policies can selectively optimize performance, energy consumption, or the tradeoff between energy consumption and quality of results. They monitor the execution of tasks at runtime in order to identify the appropriate mapping of tasks to devices, as well as to control the degree of approximation. Our experimental evaluation indicates that all three policies closely match the effectiveness of the optimal configuration, selected by an "oracle".},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{tovletoglouEnergyEfficientErrorResilientServer2015,

title = {An Energy-Efficient and Error-Resilient Server Ecosystem Exceeding Conservative Scaling Limits},

author = {Konstantinos Tovletoglou and Charalampos Chalios and Georgios Karakonstantis and Lev Mukhanov and Hans Vandierendonck and Dimitrios Nikolopoulos and Panos Koutsovasilis and Emmanouil Maroudas and Christos D. Antonopoulos and Arnau Prat-Pérez and Mustafa Venugopal and Andreas Diavastos and Zacharias Hadjilambrou and Panagiora Nikolaou and Yiannakis Sazeides and Pedro Trancoso and George Papadimitriou and Manolis Kaliorakis and Athanasios Chatzidimitriou and Dimitris Gizopoulos},

url = {https://openalex.org/W2604378805},

doi = {10.23919/date.2018.8342175},

year  = {2015},

date = {2015-03-01},

journal = {2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)},

address = {Dresden, Germany},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{kazdaridisDemonstrationNITOSBikesNet2014,

title = {A Demonstration of the NITOS BikesNet Framework},

author = {Giannis Kazdaridis and Donatos Stavropoulos and Stavros Ioannidis and Thanasis Korakis and Spyros Lalis and Leandros Tassiulas},

url = {https://doi.org/10.1109/MDM.2014.55},

doi = {10.1109/MDM.2014.55},

year  = {2014},

date = {2014-07-01},

journal = {2014 IEEE 15th International Conference on Mobile Data Management},

volume = {6},

pages = {364–367},

address = {Brisbane, Australia},

abstract = {In this paper we present NITOS Bikes Net, a framework for mobile sensing in a city-wide environment offering experimentation capabilities. More Specifically, we present a custom-made and modular prototype device that can be easily mounted on volunteers' bicycles dedicated to collecting environmental measurements and available WiFi networks. In addition, we present our enhancements in OMF framework through which we remotely control the operation of the developed devices, whenever they experience back-end connection. Finally, we analyze an indicative demonstration experiment which illustrates the capabilities of the developed framework.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{parasyrisGemFIFaultInjection2014,

title = {GemFI: A Fault Injection Tool for Studying the Behavior of Applications on Unreliable Substrates},

author = {Konstantinos Parasyris and Georgios Tziantzoulis and Christos D. Antonopoulos and Nikolaos Bellas},

url = {https://doi.org/10.1109/DSN.2014.96},

doi = {10.1109/DSN.2014.96},

year  = {2014},

date = {2014-06-01},

journal = {2014 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks},

pages = {622–629},

address = {Atlanta, GA},

abstract = {Dependable computing on unreliable substrates is the next challenge the computing community needs to overcome due to both manufacturing limitations in low geometries and the necessity to aggressively minimize power consumption. System designers often need to analyze the way hardware faults manifest as errors at the architectural level and how these errors affect application correctness. This paper introduces GemFI, a fault injection tool based on the cycle accurate full system simulator Gem5. GemFI provides fault injection methods and is easily extensible to support future fault models. It also supports multiple processor models and ISAs and allows fault injection in both functional and cycle-accurate simulations. GemFI offers fast-forwarding of simulation campaigns via check pointing. Moreover, it facilitates the parallel execution of campaign experiments on a network of workstations. In order to validate and evaluate GemFI, we used it to apply fault injection on a series of real-world kernels and applications. The evaluation indicates that its overhead compared with Gem5 is minimal (up to 3.3%), whereas optimizations such as fast-forwarding via check pointing and execution on NoWs can significantly reduce simulation time of a fault injection campaign.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{owaidaGrammarInductionMethod2014,

title = {A Grammar Induction Method for Clustering of Operations in Complex FPGA Designs},

author = {Muhsen Owaida and Christos D. Antonopoulos and Nikolaos Bellas},

url = {https://doi.org/10.1109/FCCM.2014.62},

doi = {10.1109/FCCM.2014.62},

year  = {2014},

date = {2014-05-01},

journal = {2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines},

pages = {194–201},

address = {Boston, MA},

abstract = {In large-scale datapaths, complex interconnection requirements limit resource utilization and often dominate critical path delay. A variety of scheduling and binding algorithms have been proposed to reduce routing requirements by clustering frequently-used set of operations to avoid longer, inter-operational interconnects. In this paper we introduce a grammar induction approach for datapath synthesis. The proposed approach deals with the problem of routing using information at a higher level of abstraction, even before resource scheduling and binding. It is applied on a given data flow graph (DFG) and builds a compact form of DFG by identifying and exploiting repetitive operations patterns with one or more outputs. Fully placed and routed circuits were successfully generated for complex designs that failed to be placed and routed by the standard manufacturer tool-chain without applying our method. Moreover, placement and routing time was accelerated by 16% on average. Our grammar-based approach achieved 12% reduction in area on average, mostly as a result of reducing multiplexer sizes and the number of flip-flops, without noticeable adverse effect on clock frequency. Our comparison with a state of the art algorithm described in [8] shows that our approach outperforms it in both reduction in FPGA area and time to place and route the design.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{rentifisImprovingApplicationAvailability2012,

title = {Improving Application Availability in Wireless Sensor Networks with Energy-Harvesting Capability},

author = {Ilias Rentifis and Nikos Tziritas and Petros Lampsas and Spyros Lalis and Thanasis Loukopoulos},

url = {https://doi.org/10.1109/PDCAT.2012.80},

doi = {10.1109/PDCAT.2012.80},

year  = {2012},

date = {2012-12-01},

journal = {2012 13th International Conference on Parallel and Distributed Computing, Applications and Technologies},

volume = {58},

pages = {122–127},

address = {Beijing, China},

abstract = {We assume a wireless sensor and actuator network with nodes that can harvest energy from the environment, and an application deployed in this network, which is structured as a set of cooperating mobile components that can be placed on any node that provides the required sensor and actuator resources. We propose algorithms that take into account the energy consumption rate of agents as well as energy reserves and harvesting rate of nodes, and decide about the migration of agents in order to improve application availability. Initial evaluation results via simulation show that application availability can be greatly improved compared to having a static application placement.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{krommydasAVSVideoDecoder2011,

title = {AVS video decoder on multicore systems: Optimizations and tradeoffs},

author = {Konstantinos Krommydas and Christos D. Antonopoulos and Nikolaos Bellas and Wu-chun Feng},

url = {https://doi.org/10.1109/ICME.2011.6012108},

doi = {10.1109/ICME.2011.6012108},

year  = {2011},

date = {2011-07-01},

journal = {2011 IEEE International Conference on Multimedia and Expo},

pages = {1–4},

address = {Barcelona, Spain},

abstract = {Newer video compression standards provide high video quality and greater compression efficiency, compared to their predecessors. Their increased complexity can be outbalanced by leveraging all the levels of available parallelism, task- and data-level, using available off-the shelf hardware, such as current generation's chip multiprocessors. As we move to more cores though, scalability issues arise and need to be tackled in order to take advantage of the abundant computational power. In this paper we evaluate a previously implemented parallel version of the AVS video decoder on the experimental 32-core Intel Manycore Testing Lab. We examine this previous version's performance bottlenecks and scalability issues and introduce a distributed queue implementation as the proposed solution. Finally, we provide insight on separate optimizations regarding inter macroblocks and investigate performance variations and tradeoffs, when combined with a distributed queue scheme.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{syrivelisPipeItPipelineProgramming2009,

title = {PipeIt: A Pipeline Programming Framework For Embedded Processor Array Systems-on-Chip},

author = {Dimitris Syrivelis and Spyros Lalis},

url = {https://openalex.org/W169319698},

doi = {10.1109/icppw.2009.25},

year  = {2009},

date = {2009-07-01},

journal = {2009 International Conference on Parallel Processing Workshops},

pages = {197–203},

address = {Las Vegas, NV},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{blagojevicRAxMLCellParallelPhylogenetic2007,

title = {RAxML-Cell: Parallel Phylogenetic Tree Inference on the Cell Broadband Engine},

author = {Filip Blagojevic and Alexandros Stamatakis and Christos D. Antonopoulos and Dimitrios Nikolopoulos},

url = {https://doi.org/10.1109/IPDPS.2007.370267},

doi = {10.1109/IPDPS.2007.370267},

year  = {2007},

date = {2007-03-01},

journal = {2007 IEEE International Parallel and Distributed Processing Symposium},

pages = {1–10},

address = {Long Beach, CA},

abstract = {Computational phylogeny is a challenging application even for the most powerful supercomputers. It is also an ideal candidate for benchmarking emerging multiprocessor architectures, because it exhibits fine- and coarse-grain parallelism at multiple levels. In this paper, we present the porting, optimization, and evaluation of RAxML on the cell broadband engine. RAxML is a provably efficient, hill climbing algorithm for computing phylogenetic trees, based on the maximum likelihood (ML) method. The cell broadband engine, a heterogeneous multi-core processor with SIMD accelerators which was initially marketed for set-top boxes, is currently being deployed on supercomputers and high-end server architectures. We present both conventional and unconventional, cell-specific optimizations for RAxML's search algorithm on a real cell multiprocessor. While exploring these optimizations, we present solutions to problems related to floating point code execution, complex control flow, communication, scheduling, and multilevel parallelization on the cell.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{bellasArchitecturalFrameworkAutomated2007,

title = {An Architectural Framework for Automated Streaming Kernel Selection},

author = {Nikolaos Bellas and Sek Chai and Malcolm Dwyer and Dan Linzmeier},

url = {https://doi.org/10.1109/IPDPS.2007.370389},

doi = {10.1109/IPDPS.2007.370389},

year  = {2007},

date = {2007-03-01},

journal = {2007 IEEE International Parallel and Distributed Processing Symposium},

pages = {1–7},

address = {Long Beach, CA},

abstract = {Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedded applications. The challenge to the designer is the extensive human effort required to identify the appropriate kernels to be mapped to gates and to implement a network of accelerators to execute the kernels. In this paper, we present a methodology to automate the selection of streaming kernels in a reconfigurable platform based on the characteristics of the application. The methodology is based on a flow graph that describes the streaming computations and communications. The flow graph is used to efficiently identify the most profitable subset of streaming kernels that optimize performance without exceeding the available area of the reconfigurable fabric.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{lalisProvidingSupportIntegrated2005,

title = {Providing support for integrated scientific computing: metacomputing meets the grid and the semantic Web},

author = {Spyros Lalis and Catherine Houstis and Marios Pitikakis and George Vasilakis and Manolis Vavalis},

url = {https://doi.org/10.1109/CCGRID.2005.1558623},

doi = {10.1109/CCGRID.2005.1558623},

year  = {2005},

date = {2005-05-01},

journal = {CCGrid 2005. IEEE International Symposium on Cluster Computing and the Grid, 2005.},

pages = {631–637 Vol. 2},

address = {Cardiff, UK},

abstract = {In this paper, we present an integrated system architecture for metacomputing on top of distributed scientific resources via semantic-driven information management. Our approach is to consider both data and programs as objects of an application-specific ontology, describing them via corresponding metadata schemata that can be exploited to search for and to generate information in an efficient and automated way. Metacomputations are expressed in the form of workflows thereby enabling a flexible combination of data and program objects that can reside on different servers or grid resources. Workflow descriptions are associated with ontology concepts and can be activated as a side-effect of searching for information to produce new data on demand. We also report on the current status of an implementation that provides support for several aspects of this architecture.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{tsarmpopoulosLowCostSimpletoDeployPeertoPeer2005,

title = {A Low-Cost and Simple-to-Deploy Peer-to-Peer Wireless Network based on Open Source Linux Routers},

author = {Nikolaos Tsarmpopoulos and Ioannis Kalavros and Spyros Lalis},

url = {https://doi.org/10.1109/TRIDNT.2005.3},

doi = {10.1109/TRIDNT.2005.3},

year  = {2005},

date = {2005-02-01},

journal = {First International Conference on Testbeds and Research Infrastructures for the DEvelopment of NeTworks and COMmunities},

volume = {54},

pages = {92–97},

address = {Trento, Italy},

abstract = {In this paper we present our work towards deploying a community wireless network with ad hoc communication and routing between its elements. We describe our network model and implementation of wireless routers, while motivating decisions and pointing out open issues. The main advantage of our approach is the low deployment cost and inherent flexibility in terms of adapting the network configuration with little or no human intervention, which in turn can be exploited to support the dynamic addition, removal and mobility of network elements.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{bellasProgrammableHighPerformance2003,

title = {A programmable, high performance vector array unit used for real-time motion estimation},

author = {Nikolaos Bellas and Malcolm Dwyer},

url = {https://doi.org/10.1109/ICME.2003.1220868},

doi = {10.1109/ICME.2003.1220868},

year  = {2003},

date = {2003-07-01},

journal = {2003 International Conference on Multimedia and Expo. ICME '03. Proceedings (Cat. No.03TH8698)},

pages = {I–117},

address = {Baltimore, MD},

abstract = {The MPEG-4 and H.263 video standards are enabling technologies for the proliferation of wireless multimedia applications in 3G systems. For video encoding, the motion estimation (ME) stage is typically the most demanding in terms of performance and bandwidth requirements, and is usually implemented through dedicated hardware, especially in systems with stringent power requirements. This approach, however, cannot exploit any algorithm advances on motion estimation algorithms, and requires major hardware re-design in case of modified specifications or standards. This paper describes the architecture of a programmable motion estimation unit that is used as part of a larger wireless video encoding system. An instruction set architecture (ISA) allows the development of various ME algorithms in software without the need to re-design portion of the chip.},

keywords = {},

pubstate = {published},

tppubtype = {article}

}

@article{bellasArchitecturalCompilerSupport1998,

title = {Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors},

author = {Nikolaos Bellas and Ibrahim Hajj and George Stamoulis and Constantine Polychronopoulos},

url = {http://doi.acm.org/10.1145/280756.280788},

doi = {10.1145/280756.280788},

year  = {1998},

date = {1998-08-01},

journal = {Proceedings of the 1998 international symposium on Low power electronics and design - ISLPED '98},

pages = {70–75},

address = {Monterey, CA},

keywords = {},

pubstate = {published},

tppubtype = {article}

}